Invited Talk by Dr. Rajendra Boppana on Performance Prediction of Parallel Applications Based on Small-Scale Executions

Title:  Performance Prediction of Parallel Applications Based on Small-Scale Executions
Speaker: Dr. Rajendra Boppana
Host Faculty: Dr. Ramakrishna Upadrasta
Room No: 414Academic Block-A
Time:11:00 -12:00
 
Abstract:

Predicting the execution time of parallel applications in High Performance Computing (HPC) clusters has served different objectives, including helping developers to find relevant areas of code that require fine tuning, designing better job schedulers to increase clusters’ utilization, and detecting system bottlenecks. We present a statistical approach to predict parallel application execution times using empirical analyses of the application execution times for small input sizes and the time spent on various phases of execution. We model the execution times of the application phases by selecting a suitable kernel from a collection of well-known benchmark kernels. To predict the application execution time for a larger input, the kernels are used to estimate the execution times for each major phase of the application and the overall execution time. Prior approaches required determination of application’s characteristics by extracting instruction traces, instrumenting the application code for time stamps, static code analysis, or creation of accurate simulation models. In contrast, our approach requires a few short executions (each taking less than 2 minutes) of the application and statistical analysis to find matching kernels for each phase of the application. Our experiments show that running a few times the target application with small-scale input sizes and identifying a subset of phases that accounts for a significant portion of the total run time is enough to obtain accurate predictions for parallel scientific applications. We evaluate our methodology using three well known parallel applications: SMG2000, SNAP and HPCG. Our prediction errors range from 1% to 15%.

Speaker's Bio:

Dr. Rajendra Boppana is a professor and the chair of the Department of Computer Science at the University of Texas at San Antonio (UTSA). He is also the director of the Quantitative Literacy Program, a university-wide quality enhancement program for undergraduate students. Dr. Boppana received his Ph.D. degree in computer engineering from the University of Southern California, Los Angeles, USA.

Dr. Boppana’s current research interests include the design and performance analysis of high performance computing (HPC) and cloud computing systems. He has published 75 peer-reviewed conference papers and journal articles, in addition to several book chapters on these topics. Dr. Boppana served as the principal investigator (PI) or co-PI for over 12 federally funded research grants and is the sole or lead inventor for three patents. Dr. Boppana’s recent work on random number generators, funded by a phase II STTR (small business technology transfer) grant from Army Research Office (ARO), aims to develop a robust software package that is capable of generating billions of streams of random numbers with low interstream correlations and suitable for very large scale HPC applications that run on the fastest supercomputers. Dr. Boppana taught a wide variety of course including computer architecture, parallel computing, computer networks, simulation techniques, performance evaluation, and cloud computing applications and performance.

Dates: 
Friday, December 9, 2016 - 11:00 to 12:00