ESTO: A Performance Estimation Approach for Efficient Design Space Exploration

Sparsh Mittal Zhao Zhang
AbstractóRecent advancements in CMOS fabrication and processor architectures have posed new challenges to the chip designers. The availability of a large number of design configurations, along with constraints such as energy consumption and real-time response demand exploring a large design-space for choosing the best possible configuration. However, the high cost of detailed simulators prohibit the designers from doing this. The existing techniques of performance estimation generally use intrusive methods or have ...