EqualChance: Addressing Intra-set Write Variation to Increase Lifetime of Non-volatile Caches.

Conference/Journal
Authors
Sparsh Mittal Jeffrey S Vetter
BibTex
Abstract
Abstract To address the limitations of SRAM such as high-leakage and low-density, researchers have explored use of nonvolatile memory (NVM) devices, such as ReRAM (resistive RAM) and STT-RAM (spin transfer torque RAM) for designing on-chip caches. A crucial limitation of NVMs, however, is that their write endurance is low and the large intra- set write variation introduced by existing cache management policies may further exacerbate this problem, thereby reducing the cache lifetime significantly. We present ...