AYUSH: Extending Lifetime of SRAM-NVM Way-based Hybrid Caches Using Wear-leveling

Conference/Journal
IEEE
Authors
Sparsh Mittal Jeffrey S Vetter
BibTex
Abstract
Abstract: The features and limitations of both SRAM and NVM (non-volatile memory) technologies have led the researchers to study SRAM-NVM way-based hybrid last level caches (LLCs). Since large leakage power consumption of SRAM allows including only few SRAM ways, the small write-endurance of NVM may still lead to small lifetime of these hybrid caches. We propose AYUSH, a technique for improving lifetime of SRAM-NVM hybrid caches. AYUSH uses data-migration approach to preferentially utilize SRAM for storing ...