A survey of architectural approaches for data compression in cache and main memory systems

Conference/Journal
IEEE
Authors
Sparsh Mittal Jeffrey S Vetter
BibTex
Abstract
Abstract: As the number of cores on a chip increases and key applications become even more data-intensive, memory systems in modern processors have to deal with increasingly large amount of data. In face of such challenges, data compression presents as a promising approach to increase effective memory system capacity and also provide performance and energy advantages. This paper presents a survey of techniques for using compression in cache and main memory systems. It also classifies the techniques based on key ...