Invited Talk by Dr. Rahul Nagpal on Energy Optimization for Clustered VLIW Processors

Title:Energy Optimization for Clustered VLIW Processors
Speaker Dr. Rahul Nagpal
Host Faculty: Dr.Ramakrishna Upadrasta
Room No: 212
Time:14:30 -15:30

Abstract:

Parallel computing is all about an unending quest for better performance that though started in context of supercomputers is already widespread in embedded domain and this trend is only likely to grow in the near future. Clustered architecture processors are preferred for embedded systems because centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption. Although clustering helps by improving clock speed, reducing energy consumption of the logic, and making the design simpler, it introduces extra overheads by way of inter-cluster communication.  Inter-cluster communication introduces many short idle cycles, thereby significantly increasing the overall leakage energy consumption in the functional units and other data-path components.  

After giving a brief on the evolution of parallel computing and key contributions, I will focus the discussion on scheduling algorithms that aggregate the scheduling slack of instructions and communication slack of data values to exploit the low power modes in context of clustered VLIW processors.

Speaker's Bio:

 Dr. Rahul Nagpal received his MS and PhD in Computer Science from Indian Institute of Science in 2004 and 2008 respectively. He has been working in the area of parallel computing and parallel software engineering with more than 20 papers and few patents. 

Dates: 
Wednesday, January 13, 2016 - 14:30 to 15:30